Tenders Description & Specification for CDMA DSSS Trainer
CDMA DSSS Trainer
Trainer provides a basic understanding of the concepts behind CDMA,
and various issues that need to be considered in the design of a
DSSS system.These include generation of various pseudorandom (PN) codes
like Gold, MLS & Barker with programmable tappings, variable chip
rate, and digital modulations BPSK, QPSK & digital AWGN noise with
programmable FIR low pass filter. Bit error rate (BER) measurement
with known data sequence, overall data rate dependency parameters,
spreading & dispreading with DSSS, SNR control, offset control &
so on can be performed on model.
Technical Specifications
- Direct Sequence Spread-Spectrum (DSSS) Modulator, Demodulator
- Programmable chip rates upto 10 M chi p / s
- Spreading codes :
- Gold sequences (up to 2 -1 chips) Maximal length sequences (max 23 length 2 -1 chips) Barker codes (length 11,13)
- Code modulation: BPSK / QPSK / OQPSK with output spectral shaping
filter : Raised cosine square root filler with 20 %, 25 %, or 40 %
rolloff
- Internal generation of pseudo-random bit stream and unmodulated carrier for test purposes
- Built-in channel impairments generation : 1. Additive White Gaussian Noise 2. Frequency offset (Doppler)
- Sequential code search 4-bit soft-quantized demodulated bits
- Extensive monitoring : Receiver lock, Carrier frequency error
- Power Supply : 220 V ±10%, 50 Hz / 60 Hz on request
- Power Supply : 2 VA(approx.)
- Dimensions (mm.) : W 340 × D 241 × H 105
Ltekonline are the manufacturers of CDMA DSSS Trainer used to demonstrate engineering principles in Engineering Colleges, Engineering Schools and Communication System for Engineering Teaching Lab in Universities
